[subexp-daq] DAQ compile from scratch

[Håkan T Johansson]

The attachment was missing.  Now also updated ;)

Cheers,
Håkan


On Thu, 11 Jan 2024, Håkan T Johansson wrote:

>
> (Meant to sent to the full list...)
>
> Dear Günter,
>
> It sounds like a very nice plan if you have the hardware to set up a second 
> system from scratch.  I have attached a short instruction on how to 
> downloading and compiling the codes from scratch.
>
> It would not surprise me if there already exist something like that, but then 
> we have two of them :-)  If not, we can put this (with whatever fixes are 
> needed) up somewhere (gitlab wiki or so).
>
> I did test it - but that does not guarantee much...
>
> Cheers,
> Håkan
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MYDAQ=/path/to/daq

mkdir -p $MYDAQ
cd $MYDAQ

git clone git at gitlab.com:chalmers-subexp/nurdlib.git
git clone git at gitlab.com:chalmers-subexp/trloii.git
git clone git at gitlab.com:chalmers-subexp/r3bfuser.git
git clone git at git.chalmers.se:expsubphys/drasi.git
git clone git at git.chalmers.se:expsubphys/ucesb.git

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# Download TRLO II gatewares and unpack (on PC):

cd $MYDAQ/trloii

wget http://fy.chalmers.se/~f96hajo/trloii/trloii_firmwares_f13d071c.tar.gz
tar -zxvf trloii_firmwares_f13d071c.tar.gz

######################################################################

cd $MYDAQ/trloii

# Workarounds (in case of compile issues below):

# In trloii/Makefile: Partially comment out line 3:
       proglinks # trigalign_dir

# In trloii/trloctrl/trlolib/src/trlo_setup_parser.y: Comment out line 60:
/* %define parse.error verbose */

######################################################################
# Build (PC, then VME board).

cd $MYDAQ/trloii
make

cd trloctrl
./find_firmwares.pl
make fw_1409285e_trlo_build      # choose the vulom4b trlo
make fw_5e8f5ef4_tridi_build     # and for tridi

##

cd $MYDAQ/drasi
make

##

export TRLOII_PATH=$MYDAQ/trloii        # for nurdlib to find trloii

cd $MYDAQ/nurdlib
make

##

cd $MYDAQ/r3bfuser
make drasi

######################################################################
## Build (PC only).

cd $MYDAQ/ucesb
make empty

######################################################################

# Testing and upgrading TRLO II gateware (on VME board):

ADDR=XX  # Address selectors on VULOM4(b) board

cd $MYDAQ/trloii
# List gatewares in the 8 flash regions:
bin/vulomflash --addr=$ADDR --readprogs
# See which gateware is currently running (Look for output on line
# VOLUM+0 => 0xZZZZ1f20, ZZZZ is four first hex digits of identifier.)
bin/vulomflash --addr=$ADDR --read
# Restart FPGA with gateware from region N:
bin/vulomflash --addr=$ADDR --restart=N

# Write a (new) gateware image to region N, N _not_ 0:
bin/vulomflash --addr=$ADDR --prog=N fw/vulom4b_trlo/vlogic_4b.rbt
# Then check that it works:
bin/vulomflash --addr=$ADDR --restart=N
bin/vulomflash --addr=$ADDR --read

# Also use with a DAQ before writing to region 0, which is loaded on 
# cold start.  If region 0 image is bad, it may jam the VME bus and 
# prevent re-programming.  (--restart=N can be used after cold start.)

##

# Just using the trlo_ctrl to talk to the module.
# Without any argument, shall respond with two lines, second
# contain identifier and gateware synthesis time.
trloctrl/fw_1409285e_trlo/bin_ppc-.../trlo_ctrl --addr=$ADDR

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