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<p>Dear Hans,</p>
<p><br>
</p>
<p>thank you for the explanations for r3bfuser.cfg. In the end only a single cryptic line remains in this file, right?</p>
<p><br>
</p>
<p>With the new R3B config and modified VULOM entry in main.cfg I get the following result:</p>
<p><br>
</p>
<p><span style="font-size:8pt">... everything looks nice and the SIS3316 threshold are set ...</span></p>
<p></p>
<div><span style="font-size:8pt">10: crate/crate.c:1008: .Post-init module[1]=SIS_3316.</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:1008: .Post-init module[2]=SIS_3316.</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:1073: crate_init(MCAL) }</span></div>
<div><span style="font-size:8pt">5: f_user.c:1257: had readout error, ret=0x4, trigger=1, prev=1</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">5: module/sis_3316/sis_3316.c:3096: [2]: timeout while polling for previous bank addr (bank 0 != 0) on ch 0</span></div>
<div><span style="font-size:8pt">5: module/sis_3316/sis_3316.c:2512: sis3316 bank of channel not ready for readout.</span></div>
<div><span style="font-size:8pt">5: module/sis_3316/sis_3316.c:2329: sis3316 ch[0] test_channel failed</span></div>
<div><span style="font-size:8pt">5: crate/crate.c:1954: MCAL[2]=SIS_3316 readout error=0x00000004, dumping data:</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:1970: ---[ Dump begin ]---</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:1970: Start=0x3005e230 Bytes=0=0x0</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:1970: ---[ Dump end ]---</span></div>
<div><span style="font-size:8pt">5: crate/crate.c:1449: MCAL: readout failed!</span></div>
<div><span style="font-size:8pt">5: crate/crate.c:1493: MCAL: had problems, re-initializing.</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:683: crate_deinit(MCAL) {</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:707: crate_deinit(MCAL) }</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:899: crate_init(MCAL) {</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:923: .Slow-init module[0]=GSI_VULOM.</span></div>
<div><span style="font-size:8pt">LOG: TRLO: MD5SUM: 0x1409285e (CT: 63bb1d44 = 2023-01-08 19:45:08 UTC)</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:923: .Slow-init module[1]=SIS_3316.</span></div>
<div><span style="font-size:8pt">10: module/map/map.c:224: ...rd(0x30000000+0x64/32)=535ns wr(0x30000000+0x64/32)=356ns.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1355: ..Serial number=0x00800178.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1362: ..id/firmware=0x3316200e.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[0] firmware=0x0125000c.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[1] firmware=0x0125000c.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[2] firmware=0x0125000c.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[3] firmware=0x0125000c.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, and in deadtime.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 (IN_READOUT). EC: 5</span></div>
<div><span style="font-size:8pt">10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.</span></div>
<div><span style="font-size:8pt">8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:923: .Slow-init module[2]=SIS_3316.</span></div>
<div><span style="font-size:8pt">10: module/map/map.c:224: ...rd(0x31000000+0x64/32)=540ns wr(0x31000000+0x64/32)=360ns.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1355: ..Serial number=0x008001a7.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1362: ..id/firmware=0x33162010.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[0] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[1] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">10: crate/crate.c:923: .Slow-init module[2]=SIS_3316.</span></div>
<div><span style="font-size:8pt">10: module/map/map.c:224: ...rd(0x31000000+0x64/32)=540ns wr(0x31000000+0x64/32)=360ns.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1355: ..Serial number=0x008001a7.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1362: ..id/firmware=0x33162010.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[0] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[1] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[2] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">10: module/sis_3316/sis_3316.c:1365: ..adc[3] firmware=0x01250011.</span></div>
<div><span style="font-size:8pt">^C8: lwroc_main.c:106: SIGINT received.</span></div>
<br>
<p></p>
<p>I stopped the DAQ software manually. To me it looked like, the software tried every 10 seconds to restart the DAQ.</p>
<p><br>
</p>
<p>The DAQ setup consists of 1 RIO, 1 TRIVA, 1 VULOM B, 2 SIS3316, 1 VETAR2.</p>
<p>The VULOM provides two output signals. A fast one to synchronize the SIS3316 modules and a slow one (10 Hz) that is used for triggering the DAQ. In this test setup no external signals are fed to the digitizers.</p>
<p><br>
</p>
<p><br>
</p>
<p><br>
</p>
<p><br>
</p>
<p>Best greetings</p>
<p>Günter</p>
<p><br>
</p>
<p><br>
</p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>Von:</b> subexp-daq <subexp-daq-bounces@lists.chalmers.se> im Auftrag von Hans Toshihide Törnqvist <hans.tornqvist@chalmers.se><br>
<b>Gesendet:</b> Montag, 22. Januar 2024 15:57:24<br>
<b>An:</b> Discuss use of Nurdlib, TRLO II, drasi and UCESB.<br>
<b>Betreff:</b> Re: [subexp-daq] How to start a DAQ system after NURDLIB, TRLOII, DRASI, etc. were updated</font>
<div> </div>
</div>
</div>
<font size="2"><span style="font-size:10pt;">
<div class="PlainText">Dear Günter,<br>
<br>
It seems also the r3bfuser configuration parser was updated. I took the <br>
file you sent us on the 18th and updated it, with some explanations to <br>
the changes.<br>
<br>
The SIS3316 modules do not need the barrier between. Note that with the <br>
changed main.cfg, the data will be different and the unpacker may have <br>
some problems, but let's get the DAQ running first :)<br>
<br>
Best regards,<br>
Hans<br>
<br>
On 2024-01-22 15:29, Weber, Guenter Dr. wrote:<br>
> Dear Hans,<br>
> <br>
> <br>
> yes, the VETAR does not have an upstream connection. My impression was <br>
> that in this case, the internal clock simply starts incrementing more or <br>
> less in the same way the VULOM does. I have now commented out the VETAR. <br>
> This is the result:<br>
> <br>
> <br>
> 10: lwroc_hostname_util.c:108: Host 'lyserv' known as 192.168.1.1 (port: <br>
> 56583).<br>
> Thread has no error buffer yet...<br>
> CPUS: 1<br>
> delay: 1<br>
> 10: lwroc_hostname_util.c:108: Host 'lyserv' known as 192.168.1.1 (port: <br>
> 56583).<br>
> Thread has no error buffer yet...<br>
> HOST: RIO4-MCAL-1<br>
> Token: d6d68d7b (d6d68d7b:d6d68d7b) [/mbsusr/mbsdaq/.drasi_tokens/mcal]<br>
> 10: lwroc_hostname_util.c:457: Own address: 192.168.1.71/255.255.255.0 <br>
> (eth1).<br>
> 10: lwroc_data_pipe.c:145: Data buffer READOUT_PIPE, size 419430400 = <br>
> 0x19000000, 1 consumers.<br>
> 10: lwroc_triva_readout.c:66: Silence TRIVA (HALT)<br>
> 10: lwroc_net_io.c:167: Started server on port 56583 (data port 51756).<br>
> client union size: 244 208 188 508 640 204 204 => 640<br>
> 10: lwroc_udp_awaken_hints.c:159: UDP awaken hints file: <br>
> /tmp/drasi.u1001/drasi.hints.u1001.RIO4-MCAL-1:56583<br>
> 10: lwroc_main.c:706: Log message rate limit not in effect.<br>
> 10: lwroc_readout.c:112: call readout_init...<br>
> 10: lwroc_thread_util.c:117: This is the triva control thread!<br>
> 10: lwroc_thread_util.c:117: This is the net io thread!<br>
> 10: lwroc_thread_util.c:117: This is the slow_async thread!<br>
> 10: lwroc_thread_util.c:117: This is the data server thread!<br>
> 10: lwroc_message_internal.c:472: Message client connected!<br>
> 10: lwroc_net_trans.c:1156: [drasi] Transport client connected (data) <br>
> [192.168.1.1].<br>
> 10: lwroc_triva_control.c:370: Setup TRIVA (DISBUS, HALT, MASTER, RESET)<br>
> 10: lwroc_triva_control.c:418: Minimum event time <br>
> ctime(5000)+1*rd(691)+3*wr(633)+fctime(1000)=8590 ns (116.414 kHz)<br>
> 10: lwroc_triva_state.c:1486: (Re)send ident messages...<br>
> 10: lwroc_triva_control.c:495: START TEST ACQ: HALT, CLEAR=RESET, MT=1<br>
> 9: lwroc_triva_control.c:507: TEST: GO<br>
> 10: lwroc_triva_control.c:725: RUN: RESET<br>
> 10: lwroc_triva_control.c:729: RUN: MT=14<br>
> 9: lwroc_triva_control.c:737: GO (1 good test triggers done) (max <br>
> 116.4 kHz)<br>
> 10: lwroc_triva_readout.c:376: Trigger 14 seen.<br>
> 10: config/config.c:181: Will try default cfg <br>
> path='/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default', can be set with NURDLIB_DEF_PATH.<br>
> 10: config/parser.c:287: Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/global.cfg' {<br>
> 10: config/parser.c:299: Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/global.cfg' }<br>
> 8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 <br>
> (IN_READOUT). EC: 1<br>
> 10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.<br>
> 8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...<br>
> 10: config/parser.c:287: Opened './main.cfg' {<br>
> 10: config/config.c:1299: .Global log level=verbose.<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/crate.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/crate.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/gsi_vulom.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/gsi_vulom.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/sis_3316.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/sis_3316.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/sis_3316.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/sis_3316.cfg' }<br>
> 10: config/parser.c:287: .Opened <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' {<br>
> 10: config/parser.c:299: .Closed <br>
> '/LynxOS/mbsusr/mbsdaq/mbsrun/rio4/2024_mcalstruck/nurdlib/cfg/default/module_log_level.cfg' }<br>
> 10: config/parser.c:299: Closed './main.cfg' }<br>
> 10: crate/crate.c:347: crate_create {<br>
> 10: crate/crate.c:673: crate_create(MCAL) }<br>
> 10: crate/crate.c:899: crate_init(MCAL) {<br>
> 10: crate/crate.c:923: .Slow-init module[0]=GSI_VULOM.<br>
> LOG: TRLO: MD5SUM: 0x1409285e (CT: 63bb1d44 = 2023-01-08 19:45:08 UTC)<br>
> 10: crate/crate.c:923: .Slow-init module[1]=SIS_3316.<br>
> 10: module/map/map.c:224: ...rd(0x30000000+0x64/32)=535ns <br>
> wr(0x30000000+0x64/32)=356ns.<br>
> 10: module/sis_3316/sis_3316.c:1355: ..Serial number=0x00800178.<br>
> 10: module/sis_3316/sis_3316.c:1362: ..id/firmware=0x3316200e.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[0] firmware=0x0125000c.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[1] firmware=0x0125000c.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[2] firmware=0x0125000c.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[3] firmware=0x0125000c.<br>
> 8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, <br>
> and in deadtime.<br>
> 8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 <br>
> (IN_READOUT). EC: 1<br>
> 10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.<br>
> 8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...<br>
> 8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, <br>
> and in deadtime.<br>
> 8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 <br>
> (IN_READOUT). EC: 1<br>
> 10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.<br>
> 8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...<br>
> 10: crate/crate.c:923: .Slow-init module[2]=SIS_3316.<br>
> 10: module/map/map.c:224: ...rd(0x31000000+0x64/32)=540ns <br>
> wr(0x31000000+0x64/32)=360ns.<br>
> 10: module/sis_3316/sis_3316.c:1355: ..Serial number=0x008001a7.<br>
> 10: module/sis_3316/sis_3316.c:1362: ..id/firmware=0x33162010.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[0] firmware=0x01250011.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[1] firmware=0x01250011.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[2] firmware=0x01250011.<br>
> 10: module/sis_3316/sis_3316.c:1365: ..adc[3] firmware=0x01250011.<br>
> 8: lwroc_triva_state.c:2028: Master TRIVA/MI no progress last second, <br>
> and in deadtime.<br>
> 8: lwroc_triva_state.c:2399: Master: deadtime: 1. Status: 0x10 <br>
> (IN_READOUT). EC: 1<br>
> 10: lwroc_triva_state.c:2428: [EB lyserv] EB: Status: 0x0.<br>
> 8: lwroc_triva_state.c:2488: Node(s) busy in readout, waiting...<br>
> 10: crate/crate.c:976: .Fast-init module[0]=GSI_VULOM.<br>
> 10: crate/crate.c:976: .Fast-init module[1]=SIS_3316.<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[0] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[1] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[2] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[3] = 15 mV -> 0x080001f3<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[4] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[5] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[6] = 10 mV -> 0x0800014c<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[7] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[8] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[9] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[10] = 13 mV -> 0x080001b0<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[11] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[12] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[13] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[14] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[15] = 15 mV -> 0x080001f3<br>
> 10: crate/crate.c:976: .Fast-init module[2]=SIS_3316.<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[0] = 10 mV -> 0x0800014c<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[1] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[2] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[3] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[4] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[5] = 10 mV -> 0x0800014c<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[6] = 13 mV -> 0x080001b0<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[7] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[8] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[9] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[10] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[11] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[12] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[13] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[14] = 8 mV -> 0x0800010a<br>
> 10: module/sis_3316/sis_3316.c:4177: ...threshold[15] = 8 mV -> 0x0800010a<br>
> 10: crate/crate.c:1008: .Post-init module[1]=SIS_3316.<br>
> 10: crate/crate.c:1008: .Post-init module[2]=SIS_3316.<br>
> 10: crate/crate.c:1073: crate_init(MCAL) }<br>
> 10: ctrl/ctrl.c:788: Control server online.<br>
> Thread has no error buffer yet...<br>
> 5: f_user.c:484: r3bfuser.cfg:1: Weird config!<br>
> 5: f_user.c:484: Calling abort()...<br>
> <br>
> <br>
> Looks like the DAQ is able to set the thresholds for the first two <br>
> SIS3316 modules. And then crashes. But there are only these two modules, <br>
> so the main.cfg is done. I just noticed that I did not put a BARRIER <br>
> between the initialization of the two SIS3316 modules. Is this relevant? <br>
> But if it was, the problem would probably occur after the first module <br>
> and not when the main.cfg was completely processed.<br>
> <br>
> <br>
> <br>
> <br>
> <br>
> Best greetings<br>
> <br>
> Günter<br>
> <br>
> <br>
> <br>
> ------------------------------------------------------------------------<br>
> *Von:* subexp-daq <subexp-daq-bounces@lists.chalmers.se> im Auftrag von <br>
> Hans Toshihide Törnqvist <hans.tornqvist@chalmers.se><br>
> *Gesendet:* Montag, 22. Januar 2024 15:18:20<br>
> *An:* Discuss use of Nurdlib, TRLO II, drasi and UCESB.<br>
> *Betreff:* Re: [subexp-daq] How to start a DAQ system after NURDLIB, <br>
> TRLOII, DRASI, etc. were updated<br>
> Dear Günter,<br>
> <br>
> Do you have a schematic of the setup? I.e. what modules have what<br>
> connections, in the crate and to detectors.<br>
> <br>
> Some photos would also be nice.<br>
> <br>
> This would help our understanding of the setup.<br>
> <br>
> Best regards,<br>
> Hans & Hċkan<br>
> -- <br>
> subexp-daq mailing list<br>
> subexp-daq@lists.chalmers.se<br>
> <a href="https://lists.chalmers.se/mailman/listinfo/subexp-daq">https://lists.chalmers.se/mailman/listinfo/subexp-daq</a>
<br>
> <<a href="https://lists.chalmers.se/mailman/listinfo/subexp-daq">https://lists.chalmers.se/mailman/listinfo/subexp-daq</a>><br>
> </div>
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